Sleep Mode

The SoC supports two sleep modes:

Clock-gating (CG): Turns off the clock of the SOC domain
Power-gating (PG): Turns off both power and clock of the SOC domain, resulting in lower power consumption

Since the CPU is in the SOC domain, PG sleep mode requires backing up and restoring the CPU state. Consequently, PG mode consumes slightly more time during sleep and wake-up processes compared to CG mode.

Note

For peripherals in the SOC domain, they must be reinitialized after waking up from PG sleep mode, as their power domain has been powered off during sleep.

KM0 and KM4 support both CG or both PG since they are in the same power domain.

KM4 is normally used as Application Processor (AP), and KM0 is normally used as Network Processor (NP) for Wi-Fi driver and Wi-Fi firmware, thus KM0 can enter sleep mode only if KM4 requests to enter sleep mode first.

For sleep PG, if a wakeup event occurs, PMC will turn on the SOC domain’s power and clock. KM0 will first start from the reset handler, and check the flag to see if it wakes from PG.

If so, KM0 will restore the CPU status, continue to execute from where it sleeps, and then check wakeup reasons to see if this wake source is for KM4, then decide whether to release KM4’s clock to resume KM4.

The following figure shows the sleep and wake flow of PG.
For sleep CG, if a wakeup event occurs, PMC will turn on the SOC domain’s clock. Since KM0 is not power-gated in sleep CG, it will wake up and continue to execute from where it sleeps, and then check wakeup reasons to see if need to resume KM4.

The following figure shows the sleep and wake flow of CG.

Two core processors design of NP and AP is largely for power saving.

The AP is used for application, and the NP is used for Wi-Fi firmware, Wi-Fi driver, and power/clock control. The sleep mode is realized with the tickless and wakelock mechanism.

The NP and AP all support CG and PG. The NP can enter sleep mode only if the AP is in sleep mode. Recommended sleep mode for three cores is NP CG + AP CG or NP PG + AP PG. For the reason that two CPUs are in the same power domain, they should enter PG at the same time.

The following figure shows the sleep and wake flow of NP PG + AP PG.

../../rst_ps/rtos/figures/sleep_and_wake_flow_of_pg_lite_nda.svg

When the AP is in idle task, it will judge whether it is necessary to enter sleep mode. If yes, the AP executes the suspend function and backs up the registers of CPU, NVIC, MPU, etc. The AP sends an IPC message to NP and then executes WFI (waiting for interrupt) to make itself halt, then the NP receives the IPC message and closes the clock or power of the AP in IPC interrupt handler.
When the NP is in idle task, it will judge whether it is necessary to enter sleep mode. If yes, the NP will execute the suspend function and backs up the registers of CPU, NVIC, MPU, etc. The NP sends a sleep request to PMC and then executes WFI to make itself halt, then the PMC closes the clock or power of the NP.

If wakeup event occurs, the PMC will turn on the NP’s clock or power and NP will continue to execute code from where it halts. If the AP is requested to be woken up, the NP will turn on the power of the AP. After the AP is powered on, it will do the boot-on process, and check whether it wakes up from PG. If yes, it will refill the backup register value into the CPU, NVIC, MPU, etc. The AP will jump to the code where it backs up CPU register.

NP CG + AP CG is relatively simple. AP sends IPC and executes WFI to halt itself. NP will close AP clock in IPC handler. NP sends CG request to PMC and executes WFI to halt itself.

After NP wakes up, if AP needs to wake up, it will enable AP’s clock to wake AP. AP will execute code from where it halts.

The following figure shows the sleep and wake flow of CG.

../../rst_ps/rtos/figures/sleep_and_wake_flow_of_cg_lite_nda.svg

It can be seen from the flow that AP just executes WFI to halt itself in both CG and PG mode, and NP controls the clock and power.

The application should be designed to that idle task should have the opportunity to execute and tickless should be enabled, or the sleep flow will not be executed.

Three core processors design of NP, AP and DSP is largely for power saving.

The AP is used for the application, and the NP is used for Wi-Fi firmware, Wi-Fi driver, and power/clock control, while the DSP is a co-processor.

The sleep mode is realized with the tickless and wakelock mechanism.

The NP and AP all support CG and PG, and DSP supports PG. The NP can enter sleep mode only if the AP is in sleep mode.

Recommended sleep mode for three cores is NP CG + AP CG or NP PG + AP PG. For the reason that three CPUs are in the same power domain, they should enter PG at the same time.

The following figure shows the sleep and wake flow of NP PG + AP PG.

When the AP is in idle task, it will judge whether it is necessary to enter sleep mode. If yes, the AP executes the suspend function and backs up the registers of CPU, NVIC, MPU, etc. The AP sends an IPC message to NP and then executes WFI (waiting for interrupt) to make itself halt, then the NP receives the IPC message and closes the clock or power of the AP in IPC interrupt handler.
When the NP is in idle task, it will judge whether it is necessary to enter sleep mode. If yes, the NP will execute the suspend function and backs up the registers of CPU, NVIC, MPU, etc. The NP sends a sleep request to PMC and then executes WFI to make itself halt, then the PMC closes the clock or power of the NP.