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Ameba IoT Docs
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Products

All SoCs


RTL8720E RTL8721Dx RTL8726E RTL8713E RTL8730E RTL8721F

Select SoC via Features


HiFi DSP Series ›

HiFi DSP Series

RTL8726E RTL8713E

Cortex-A Linux Series ›

Cortex-A Linux Series

RTL8730E

Display Series ›

RTL8721Dx RTL8730E RTL8721F

Audio Series ›

RTL8726E RTL8713E RTL8730E

Wi-Fi 6 + BLE Series ›

RTL8726E RTL8713E RTL8720E

Wi-Fi 2.4G/5G + BLE Seriess ›

RTL8721Dx RTL8730E RTL8721F

Wi-Fi + Classic BT Series ›

RTL8726E RTL8713E RTL8730E

Wi-Fi R-MESH Series ›

RTL8721Dx RTL8721F

Select SoC via Applications


IoT Control ›

RTL8720E RTL8721Dx RTL8721F

Design Center

Application Note


FreeRTOS Linux DSP Zephyr Wi-Fi Guide

SDK


FreeRTOS SDK Linux SDK Zephyr SDK

Advanced Features


AT Command USB Low-Power Multimedia Audio LVGL-GUI

Wi-Fi Advanced Features ›

Wi-Fi Card Mode Wi-Fi R-Mesh Wi-Fi CSI Wi-Fi Zephyr Wi-Fi CAST

AI Voice ›

AFE (Audio Front End) KWS (Keyword Spotting) VAD (Voice Activity Detection) ASR (Automatic Speech Recognition)

Tools


LOG Tool Flash Program Tool Flash Program Tool(1toN) Wi-Fi RF Test Tool BT RF Test Tool
  • SoCs
  • Modules
  • DevBoards
  • Solutions
  • Wi-Fi
  • FreeRTOS
  • Linux
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  • HiFi DSP
    • DSP Environment
    • DSP Build
    • DSP Debug
    • DSP ISS Simulation
    • DSP ABI Calling
    • DSP Layout
    • DSP Precautions
    • DSP Applications
    • DSP Library
  • AI
  • Tools
  • Ecosystem
  • Contact
  • User Manual

Digital Signal Processing (DSP)

  • DSP Environment
    • Preparation
    • Installing Toolchains
  • DSP Build
    • Compiling Project and Downloading Image
    • Adding Folder or Files into Project
    • Setting the Project
  • DSP Debug
    • Connecting DSP to J-Link
    • Using Xplorer GUI to Debug the Program
    • Using xt-gdb to Debug the Program
  • DSP ISS Simulation
    • Compiling Project
    • Simulation Configuration and Start
    • CMD Simulation
    • Profile with RTOS Considerations
    • Reference Document
  • DSP ABI Calling
    • Calling Conventions
    • Switching between Call0 and Windowed Register ABI
    • Placing Libs According to Calling Conventions
  • DSP Layout
    • Default Layout of DSP
    • Placing Codes/Data into SRAM
    • Changing Default Layout of LSP
  • DSP Precautions
    • iDMA
    • FreeRTOS Systick
    • Cacheline
    • MPU Entry
  • DSP Applications
    • DSP Memory
  • DSP Library
    • HiFi 5 NatureDSP Signal Library
    • HiFi 5 Neural Network Library
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